Inhaltsangabe3D IC INTEGRATION SINCE 2008

3D IC Nomenclature

Process Standardization

The Introduction of Interposers (2.5D)

The Foundries

Memory

The Assembly and Test Houses

3D IC Application Roadmaps



KEY APPLICATIONS AND MARKED TRENDS FOR 3D INTEGRATION AND INTERPOSER TECHNOLOGIES

Introduction

Advanced Packaging Importance in the Semiconductor Industry is Growing

3D Integration-Focused Activities - The Global IP Landscape

Applications, Technology, and Market Trends



ECONOMIC DRIVERS AND IMPEDIMENTS FOR 2.5D/3D INTEGRATION

3D Performance Advantages

The Economics of Scaling

The Cost of Future Scaling

Cost Remains the Impediment to 2.5D and 3D Product Introduction



INTERPOSER TECHNOLOGY

Definition of 2.5D Interposers

Interposer Drivers and Need

Comparison of Interposer Materials

Silicon Interposers with TSV

Lower Cost Interposers

Interposer Technical and Manufacturing Challenges

Interposer Application Examples

Conclusions



TSV FORMATION OVERVIEW

Introduction

TSV Process Approaches

TSV Fabrication Steps

Yield and Reliability



TSV UNIT PROCESSES AND INTEGRATION

Introduction

TSV Process Overview

TSV Unit Processes

Integration and Co-Optimization of Unit Processes in Via Formation Sequence

CoOptimization of Unit Processes in Backside Processing and ViaReveal Flow

Integration and Co-Optimization of Unit Processes in Via-Last Flow

Integration with Packaging

Electrical Characterization of TSVs

Conclusions



TSV FORMATION AT ASET

Introduction

ViaLast TSV for Both D2D and W2W Processes in ASET

TSV Process for D2D

TSV Process for W2W

Conclusions



LASERASSISTED WAFER PROCESSING: NEW PERSPECTIVES IN THROUGHSUBSTRATE VIA DRILLING AND REDISTRIBUTION LAYER DEPOSITION

Introduction

Laser Drilling of TSVs

DirectWrite Deposition of Redistribution Layers

Conclusions and Outlook



TEMPORARY BONDING MATERIAL REQUIREMENTS

Introduction

Technology Options

Requirements of a Temporary Bonding Material

Considerations for Successful Processing

Surviving the Backside Process

Debonding



TEMPORARY BONDING AND DEBONDING - AN UPDATE ON MATERIALS AND METHODS

Introduction

Carrier Selection for Temporary Bonding

Selection of Temporary Bonding Adhesives

Bonding and Debonding Processes

Equipment and Process Integration



ZONEBOND®: RECENT DEVELOPMENTS IN TEMPORARY BONDING AND ROOM-TEMPERATURE DEBONDING

Introduction

Thin Wafer Processing

ZoneBOND Room-Temperature Debonding

Conclusions



TEMPORARY BONDING AND DEBONDING AT TOK

Introduction

Zero Newton Technology

Conclusions



THE 3M (TM) WAFER SUPPORT SYSTEM (WSS)

Introduction

System Description

General Advantages

HighTemperature Material Solutions

Process Considerations

Future Directions

Summary



COMPARISON OF TEMPORARY BONDING AND DEBONDING PROCESS FLOWS

Introduction

Studies of Wafer Bonding and Thinning

Backside Processing

Debonding and Cleaning



THINNING, VIA REVEAL, AND BACKSIDE PROCESSING - OVERVIEW

Introduction

Wafer Edge Trimming

Thin Wafer Support Systems

Wafer Thinning

Thin Wafer Backside Processing



BACKSIDE THINNING AND STRESS-RELIEF TECHNIQUES FOR THIN SILICON WAFERS

Introduction

Thin Semiconductor Devices

Wafer Thinning Techniques

Fracture Tests for Thin Silicon Wafers

Comparison of Stress-Relief Techniques for Wafer Backside Thinning

Process Flow for Wafer Thinning and Dicing

Summary and Outlook on 3D Integration



VIA REVEAL AND BACKSIDE PROCESSING

Introduction

Via Reveal and Backside Processing in Via-Middle Process

Backside Processing in Back-Via Process

Backside Processing and Impurity Gettering

Backside Processing for RDL Formation



DICING, GRINDING, AND POLISHING (KIRU KEZURU AND MIGAKU)

Introduction

Grinding and Polishing

Dicing

Summary



OVERVIEW OF BONDING AND ASSEMBLY FOR 3D INTEGRATION

Introduction

Direct, Indirect, and Hybrid Bonding

Requirements for Bonding Process and Materials

Bonding Quality Characterization

Discussion of Specific Bonding and Assembly Technologies

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